Synchronous systems require that data be stable at specific, predefined time periods. Should the data change during these time periods, it may be improperly interpreted. More specifically, when a microprocessor accesses data, the data must not change during critical portions of the access cycle.
Modern digital Telecommunication systems use multiple microprocessors to execute the complex software which controls the Telecommunication systems. These microprocessors are considered synchronous systems, but quit often are not synchronized to each other. In addition, the microprocessors are not synchronized to the Time-Division-Multiplexed (TDM) data.
TDM data is a synchronous serial data stream divided into several time slots. Where each time slot carries Pulse Coded modulation (PCM) voice samples. Should the microprocessor need to access the TDM data, some form of translation between the microprocessor synchronous system and the TDM synchronous system must be performed.
Microprocessors generally access data in a parallel format while, TDM data is generally in a serial format. Therefore, a serial-to-parallel converter is used to transfer the data from the TDM data stream to the microprocessor, and a parallel-to-serial converter is used to transfer the data from the microprocessor to the TDM data stream.
In prior art implementations, the microprocessor accesses the converters directly. Should the microprocessor try to access a converter while the data is being serially shifted, the microprocessor is placed in a HOLD condition. Once the data is shifted in, the microprocessor is released from the HOLD condition and normal processing can resume.
The present invention precludes placing the microprocessor in a HOLD condition and therefore consumes less processing time. The present invention adds a latch between the microprocessor and the serial-to-parallel converter. But, the data must still be transferred between the latches and the converters at an appropriate time. The present invention determines when this transfer is to occur.
Accordingly, it is the objective of the present invention to provide a synchronous interface circuit which allows a synchronous microprocessor to access a synchronous Time-Division-Multiplexed (TDM) data stream.